Image processing and FPGA vision, from sensor to result.
Camera and sensor pipelines, codecs and neural inference realised in hardware — modelled first, converted to fixed point, and taken to RTL and verification, where image quality, throughput and FPGA area are traded deliberately rather than discovered.
An image is something you build, not something you receive.
A sensor produces raw, mosaiced, noisy samples; a codec produces a bitstream; a LiDAR produces a sparse cloud. Everything a system actually uses — a clean image, a compressed frame, a dense scan — is built by a pipeline, and moving that pipeline into an FPGA turns every algorithm choice into an area, timing and memory decision.
Faststream builds these pipelines the same way each time: a reference model first, an honest quality-against-area evaluation per stage, fixed-point conversion that matches the model, buffering designed before the arithmetic, and RTL verified against the reference. The programmes below are that method applied across capture, correction, compression and inference.
Six programmes, from capture to codec.
Each is written at property level: the challenge, the architecture, what consumed the schedule, and the outcome.
A complete camera pipeline in hardware
MIPI-CSI-2 capture, sensor correction, demosaic, colour and tone, then JPEG — a full ISP as RTL, where every stage trades image quality against FPGA area.
SENSOR VALIDATIONValidating a 2,000 fps image sensor
An FPGA on Kintex UltraScale capturing a ~2,000 fps DROIC over LVDS and streaming to a host at ≈5.2 Gbps for offline characterisation.
SPACE IMAGINGCCSDS 122.1 hyperspectral compression
A lossless and lossy compressor IP core on Zynq, fed over SpaceFibre at 6.25 Gbps and validated bit-exact against the CNES golden model.
AUTOMOTIVE VISION16-to-64-channel LiDAR super-resolution
A neural-network IP core on Zynq UltraScale+ upscaling a sparse LiDAR to dense, in real time at 10–15 fps — built via HLS and DPU.
VIDEO / FPGA CLOUDH.264 decoder as an FPGA cloud instance
A Zynq 7-series decoder in Vivado HLS, provisioned through OpenStack and reconfigured via ICAP, decoding a stream for a remote client.
IMAGE PROCESSINGHigh-throughput JPEG decoder
A streaming JPEG decoder in Verilog, modelled first in C++, with configurable DQT/DHT tables and chroma subsampling support.
What these programmes draw on.
Industries this serves.
Bring us the difficult part.
Tell us the sensor or codec, the quality and throughput target, and the device. Image pipelines that have to close in fixed point on real fabric are where Faststream is strongest.