Can a neural network increase LiDAR resolution?
Yes — a network can infer a denser scan from a sparse one. Here a 16-channel 3D LiDAR was upscaled to 64-channel resolution, running in real time on an FPGA.
High-channel-count LiDAR is expensive; low-channel-count LiDAR is affordable but sparse. A neural network can bridge the gap — inferring the denser scan from the sparse one — but only if it runs in the vehicle, in real time, inside a power budget a car can carry, which rules out doing it on a datacentre GPU.
The task was to take a 16-channel 3D LiDAR and produce the resolution of a 64-channel unit, as a neural-network IP core on a Xilinx Zynq UltraScale+ device, processing frames as they arrive rather than in a batch after the fact.
Two implementation routes were taken deliberately: one from a high-level Python model through HLS tools, and one using Xilinx DPU parametrisable deep-learning cores. The comparison is the point — the same network, two paths to fabric, with different area, effort and performance trade-offs.
Stated before they had answers.
The upscaling only has value if it keeps up with the sensor inside the vehicle's power envelope — not offline on a GPU.
Upscaling 16 channels to 64 is a learned mapping that had to be realised as an IP core, not a script.
HLS from a Python model versus Xilinx DPU cores give different area and performance; both were built to make the trade-off visible.
3D LiDAR data had to be pre-processed into a form the network consumes and buffered without stalling the pipeline.
A sparse 16-channel scan arrives over Ethernet and is pre-processed from a 3D point cloud into a 2D range image. The neural-network IP core — built two ways, through HLS from a Python model and using Xilinx DPU cores — upscales it, with ping-pong buffering keeping the pipeline moving, and the 64-channel result leaves over 1 Gbps Ethernet at 10–15 frames per second.
The specific scope, rather than a capability list.
Written out because a reader facing the same programme gets more from this than from a summary of what went well.
The network had to keep up with the sensor on an in-vehicle device, which shaped every quantisation and buffering choice.
Building both the HLS and DPU implementations was more work, but it is the only way to compare area and performance honestly rather than argue about them.
Pre-processing 3D LiDAR into a representation the network consumes — and back — is where much of the real engineering sat.
Ping-pong buffering was needed so acquisition, inference and output overlap rather than serialise.
16-to-64-channel super-resolution running at 10–15 fps on Zynq UltraScale+.
The same network through HLS and on Xilinx DPU cores, with the trade-offs measured, not asserted.
Inference in the vehicle's power budget rather than on a datacentre GPU.
Pre-processing, buffering and NN integration reusable for other sparse-to-dense sensing tasks.
Customer projects are presented at property, capability, outcome and integration level. Customer names, internal architecture and confidential deliverables are not disclosed. Where a figure would identify a customer or a design, it is omitted rather than approximated. More detail is available under a non-disclosure agreement, within the limits each customer has agreed.
Every item links to its own page.
Machine vision and edge inference.
CAPABILITYAccelerators, quantisation, RTL.
CAPABILITYCamera, LiDAR, radar, fused.
CAPABILITYModels inside the power budget.
SOLUTIONThe wider body of imaging work.
SERVICEArchitecture, HDL, timing closure.
Yes — a network can infer a denser scan from a sparse one. Here a 16-channel 3D LiDAR was upscaled to 64-channel resolution, running in real time on an FPGA.
Because the inference has to happen in the vehicle, in real time, within a power budget a car can carry — which a datacentre GPU cannot meet.
HLS builds the network from a high-level model into custom RTL; the DPU uses Xilinx's parametrisable deep-learning cores. They trade area, effort and performance differently, so both were built and compared.
The design processed frames in real time at 10–15 fps, with the upscaled output sent to a host over 1 Gbps Ethernet.
Tell us the sensor, the target device and the frame rate. Real-time inference on FPGA fabric, inside a real power budget, is core Faststream work.