Faststream Silicon
Custom silicon, from a blank specification to a mask set.
Architecture, RTL, verification, design for test, static timing, physical implementation and mixed-signal integration — across mature and advanced nodes, chosen by what the application needs rather than by which number is smallest.
- ASIC and SoC, architecture through tapeout
- FPGA design and FPGA-to-ASIC conversion
- UVM verification and coverage closure
- DFT, ATPG and production test
- Mixed-signal and analog integration
- TSMC and GlobalFoundries PDKs