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SYSTEM INTEGRATION

Hardware & High-Speed PCB

Board design is where a silicon specification meets physics. Faststream covers schematic capture, high-speed layout, signal and power integrity analysis, EMC-aware design, prototype build, bring-up and validation — including the stack-up and return-path decisions that determine whether a design will pass certification before anyone has built one.

SchematicHigh-speed layoutSI / PIEMCBring-up
Four-layer PCB stack-up in section, with impedance reference and overall thickness
SoldermaskL1 signal — 1 oz Cu35 µmPrepreg100 µmL2 ground planereference for L1Core0.8 mmL3 power planePrepreg100 µmL4 signal — 1 oz Cu35 µmSoldermask1.6 mm nominaldifferential pairImpedance is set here — trace width, spacing andthe distance to the L2 reference plane below.Change the stack-up and every trace changes with it.SECTION A–AFour-layer stack-up, viewed in sectionNot to scale. Copper shown hatched; dielectric shown cross-hatched.
SCOPE

What the work covers.

COMMON FAILURES

What actually goes wrong.

Return-path discontinuity. A high-speed signal crossing a plane split has no adjacent return path, so the return current takes a long detour. The result is emissions, crosstalk and an eye that closes for no reason visible in the schematic.

Decoupling by rote. Capacitors placed by convention rather than against a plane impedance target, producing a power delivery network that is fine at DC and resonant somewhere that matters.

Late EMC. Emissions problems discovered at a test house cost a re-spin. Considered at layout, they usually cost nothing.

Optimistic thermal assumptions. A part rated at 85 degrees ambient in a sealed enclosure in direct sun is not operating at 85 degrees ambient.

PROCESS

From schematic to validated board.

01

Architecture and component selection

Function allocation, part selection against availability and lifecycle, and power architecture defined.

02

Schematic

Capture, review and design rule checking, with an explicit review of reset, power sequencing and default bus states.

03

Stack-up and constraints

Layer stack, impedance targets and routing constraints agreed before layout starts.

04

Layout

Placement, high-speed routing, power distribution and manufacturability review.

05

Analysis

Signal integrity, power integrity and thermal analysis on the critical subset.

06

Prototype and bring-up

Build, power-on, interface validation and systematic debug against a written plan.

07

Validation and iteration

Characterisation across the operating envelope, design revision, and release for manufacture.

COMMON QUESTIONS

What engineers ask before they call.

01

What makes a PCB design high-speed?

Edge rate rather than clock frequency. Once signal rise times are short enough that trace length is a meaningful fraction of the wavelength, transmission-line behaviour dominates and impedance control, return paths and length matching all become design constraints rather than good practice.

02

When should EMC be considered?

At stack-up and layout. Emissions problems found at a test house cost a board re-spin and schedule; the same problems addressed during layout usually cost nothing but attention.

03

Does Faststream build prototypes?

Faststream manages prototype build with manufacturing partners, and performs bring-up, validation and characterisation.

KEEP READING

Related work.

BUILD WITH FASTSTREAM

Bring us the difficult part.

Tell us the specification, the constraint and the deadline. Programmes that cross silicon, radio, embedded and AI are where Faststream is strongest.