What is CCSDS 122.1?
A consultative standard for image data compression used in space missions. CCSDS 122.1-B-1 covers hyperspectral imagery, with lossless and lossy modes.
SPACE IMAGING
A CCSDS 122.1 hyperspectral image compressor, in FPGA, validated to the golden model.
A satellite makes far more hyperspectral data than it can send home. Compression is not an optimisation on the ground; it is what makes the downlink budget close at all, and it has to happen on the spacecraft, in hardware, within a power and radiation envelope that rules out a general-purpose processor.
CONTEXT
Where this started.
CCSDS 122.1-B-1 is the consultative standard for that compression. Implementing it in an FPGA means turning a specification written for correctness into a streaming IP core that keeps up with the sensor, offers both lossless and lossy modes, and — critically — produces exactly the bytes the standard says it should.
The design was implemented on a Xilinx Zynq device and fed over SpaceFibre, one of the standard high-speed interfaces for space, at 6.25 Gbps. Correctness was not a matter of opinion: compressed output was compared against the golden responses produced by the CNES CCSDS 122.1-B-1 reference model.
CHALLENGES
4 problems, named.
Stated before they had answers.
01
Bit-exact conformance to the standard
A compressor is only useful if the ground can decompress it. Output had to match the CNES golden model exactly, not approximately.
02
Lossless and lossy in one core
The same IP core had to support both modes without two separate designs.
03
Keeping up with the sensor over SpaceFibre
Data arrives at 6.25 Gbps; the core and its interfaces had to sustain that rate, not just process a stored image.
04
A space-grade implementation target
The design had to fit the constraints of a spacecraft, on a Zynq device, rather than a lab FPGA with room to spare.
ARCHITECTURE
How the system was built.
Hyperspectral images arrive over SpaceFibre at 6.25 Gbps, cross an AXI4-Stream interconnect into the CCSDS 122 compression core running on the Zynq programmable logic, and land in DDR3. The Zynq processing system configures the core over RMAP. During validation, the compressed images were compared bit-for-bit against the golden responses of the CNES CCSDS 122.1-B-1 reference model.
CONTRIBUTION
What Faststream did.
The specific scope, rather than a capability list.
- FPGA implementation of CCSDS 122.1-B-1 — the consultative standard for image data compression, in hardware.
- Lossless and lossy compressor IP core — a single core supporting both modes for hyperspectral satellite imagery.
- SpaceFibre ingest at 6.25 Gbps — AXI4-Stream capture from an SFF+/SpaceFibre link into the core.
- Zynq integration — implementation on a Xilinx Zynq XC7Z045 with RMAP-based configuration from the processing system.
- System validation — comparison of compressed output against the CNES CCSDS 122.1-B-1 golden reference model.
- Throughput instrumentation — cycle counters to confirm the core sustains the link rate.
WHAT WAS HARD
The parts that consumed the schedule.
Written out because a reader facing the same programme gets more from this than from a summary of what went well.
01
Bit-exact against the golden model
Matching the CNES reference exactly — not close enough — was the whole bar, because the ground decompressor assumes conformance.
02
Two modes, one core
Supporting lossless and lossy without duplicating the design meant the datapath had to be parameterised, not forked.
03
Sustaining 6.25 Gbps end to end
The SpaceFibre ingest, interconnect and core all had to hold the rate together; the slowest link sets the ceiling.
04
Fitting a space target
Resource and timing had to close on a Zynq device suitable for a spacecraft, not on unlimited fabric.
OUTCOME
What resulted.
A conformant CCSDS 122.1 core in FPGA
Lossless and lossy hyperspectral compression that matched the CNES golden model during validation.
Line-rate over SpaceFibre
Compression sustained against a 6.25 Gbps ingest, confirmed with on-chip cycle counters.
Validated on a space-representative device
Implemented and closed on a Xilinx Zynq XC7Z045.
A reusable space-compression IP core
A parameterised core reusable across hyperspectral missions rather than tuned to one payload.
Confidentiality
Customer projects are presented at property, capability, outcome and integration level. Customer names, internal architecture and confidential deliverables are not disclosed. Where a figure would identify a customer or a design, it is omitted rather than approximated. More detail is available under a non-disclosure agreement, within the limits each customer has agreed.
CAPABILITY USED
What this was built from.
Every item links to its own page.
PLATFORM
Faststream Silicon
FPGA and SoC design.
CAPABILITYHigh-speed interfaces
SerDes, SpaceFibre-class links.
SERVICEFPGA Design
Architecture, HDL, timing closure.
SOLUTIONImage Processing & FPGA Vision
The wider body of imaging work.
CASE STUDYFPGA satellite SDR modem
Another space-grade FPGA programme.
PRODUCTSemiconductor IP
Licensable digital cores.
WHERE THIS APPLIES
Industries this serves.
COMMON QUESTIONS
Questions this programme gets asked.
Why compress hyperspectral images on the spacecraft?
Because the sensor produces far more data than the downlink can carry. Compression in hardware, on board, is what makes the link budget close within the power and radiation envelope.
How was correctness proven?
Compressed output was compared against the golden responses of the CNES CCSDS 122.1-B-1 reference model — bit-exact conformance, not a subjective quality check.
What interface fed the core?
SpaceFibre, a standard high-speed interface for space applications, delivering images at 6.25 Gbps over an SFF+ adapter into an AXI4-Stream.
KEEP READING
Related work.
BUILD WITH FASTSTREAM
Bring us the difficult part.
Tell us the standard, the sensor rate and the target device. Conformant compression IP that closes on space-grade fabric is core Faststream work.