Splitting one wide digitised band into many narrow channels, at a cost that grows with total bandwidth rather than with channel count. The naive approach — a mixer, filter and decimator per channel — multiplies by the number of channels. A polyphase filter bank with an FFT does not, and that difference decides whether a wideband payload fits in the device at all.
A wideband receiver digitises far more spectrum than any one signal occupies. Channelisation is how that capture becomes separate, individually usable channels.
The naive implementation is the reason this IP exists. Building a digital down-converter per channel — mixer, low-pass filter, decimator — costs N times one channel. Across dozens of carriers that is a device nobody budgeted for. A polyphase filter bank restructures the same operation so the filtering is shared and an FFT performs the frequency separation, and the cost then tracks total bandwidth rather than channel count.
The constraint that follows is that channel spacing and count are tied to the filter bank and transform size. Uniform channelisation is efficient and rigid; non-uniform plans and channels that must be contiguous without loss at the crossovers require oversampled configurations, which cost more and are the usual reason a channeliser is larger than first estimated.
| Parameter | Detail |
|---|---|
| Architecture | Polyphase filter bank with FFT-based frequency separation |
| Scaling | Resource grows with total bandwidth, not with the number of channels |
| Configurations | Critically sampled for efficiency; oversampled where channels must be contiguous |
| Channel plans | Uniform spacing as standard; non-uniform arrangements where the plan requires it |
| Prototype filter | Response designed against crossover loss and adjacent channel rejection |
| Direction | Analysis for receive; synthesis for transmit combining |
| Reconfiguration | Channel plan changeable at runtime where the deployment needs it |
| Target | FPGA fabric or ASIC, with the transform sized to the device's DSP and memory |
Maturity — silicon-proven, FPGA-validated or RTL stage — is confirmed at enquiry for the specific configuration you need, rather than claimed generically here.
Send the target node, the interface requirements and the integration context. If this is not the right fit, that will be said early rather than discovered at integration.
A filter bank that splits one wide digitised band into many narrow channels by sharing the filtering across all channels and using an FFT to perform the frequency separation. It replaces a per-channel down-converter with a structure whose cost tracks total bandwidth rather than channel count.
Because the cost multiplies. A mixer, low-pass filter and decimator per channel is straightforward for two or three channels and unaffordable for forty. The polyphase structure performs the equivalent operation with the filtering amortised across the whole bank.
A critically sampled bank is the most efficient but has loss at the crossovers between adjacent channels. Oversampling the bank removes that loss so channels can be treated as contiguous, at a cost in resource — and it is the usual reason a channeliser is larger than a first estimate suggested.
Where the deployment requires it, yes, though reconfiguration flexibility costs area. Whether a plan genuinely changes in service is a question worth settling at architecture, because carrying unused flexibility is a permanent cost.
A satellite payload or NTN gateway sees many narrowband returns spread across a wide band, and separating them is exactly what a channeliser does efficiently. Doppler spread across the band is accommodated in the channel plan and the surrounding recovery loops rather than by the bank itself.
The filter stages beneath the bank.
PRODUCTWhere a channeliser is deployed.
PRODUCTNon-terrestrial link integration.
TECHNOLOGYThe link budget above it.
PRODUCTThe wideband capture feeding it.
SOLUTIONThe commercial offering.
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