Where is this role based?
Bengaluru, India, or the United States — this role is open in both. Full time.
Embedded · Hardware/software co-design
Compiler Engineer
Own the toolchain for custom silicon — the LLVM/GCC back end, code generation and intrinsics that turn a new instruction set or accelerator into something software can actually use.
THE WORK
What the role involves.
- Build and extend LLVM/GCC back ends for custom ISAs, DSPs and accelerators — instruction selection, scheduling, register allocation and ABI.
- Co-design the instruction set and programming model with the architecture team — what the hardware should expose for the compiler to exploit.
- Write intrinsics, runtime and libraries, and tune code generation for performance, code size and power on the target.
- Own correctness and performance of the generated code — test suites, benchmarks and bring-up against the real silicon or its model.
TO APPLY
Send us something specific.
A CV is fine. What helps more is a paragraph about a problem you solved that was harder than it looked, and what you would do differently now. Apply through our application form — attach your résumé and write a cover letter. The cover letter is required.
COMMON QUESTIONS
What engineers ask before they call.
What experience is expected?
10+ years. The range is a guide rather than a filter — make the case if you are outside it.
How do I apply?
Apply through the application form. A résumé and a cover letter are both required — the cover letter is not optional.
KEEP READING
Related work.
BUILD WITH FASTSTREAM
Bring us the difficult part.
Tell us the specification, the constraint and the deadline. Programmes that cross silicon, radio, embedded and AI are where Faststream is strongest.