An ASIC that runs on the energy it captures from the air.
RF front end, power conversion, references, clocking, supervision and ultra-low-power digital on a single die — where every subsystem competes for the same microwatts and cold start is a circular dependency.
DomainComplete RF mixed-signal ASIC
PlatformsFaststream Silicon
ScopeArchitecture to tapeout-ready signoff
Binding constraintNo battery. At all.
DisclosureProperty level; customer not named
CONTEXT
Where this started.
An energy-harvesting device has no power budget in the conventional sense. It has an energy budget that arrives intermittently, at a level varying by orders of magnitude with distance and orientation, and everything the chip does has to fit inside whatever is available at that moment.
That inverts the normal design order. Instead of specifying function and then budgeting power, the architecture starts from the harvested power curve and works backwards: how much can be rectified at the weakest field strength that must still work, what conversion efficiency is achievable there, what survives conditioning, and what digital activity that permits.
The customer arrived with a function specification and an assumption that the power side would follow. It does not; the power side leads and the function specification is what gets negotiated.
CHALLENGES
4 problems, named.
Stated as the customer stated them, before any of them had an answer. A challenge that is only
described after it was solved is a description of the solution.
01
No battery anywhere in the system
Every microwatt the digital logic spends is a microwatt the rectifier had to capture first. Conventional low-power techniques were the starting point, not the answer.
02
Cold start is circular
Before the storage element holds useful charge there is not enough voltage to run the circuits that manage charging. Resolving that dependency shapes the entire power architecture.
03
Field strength varies by orders of magnitude
Operating range is set by the weakest usable field, so a rectifier optimised for peak efficiency at high incident power underperforms exactly where it matters.
04
Digital and analog share one die
A rectifier operating at millivolt sensitivity sits beside switching logic. Isolation had to be solved in the floorplan, not adjusted afterwards.
ARCHITECTURE
How the system was built.
Cold start is the circular dependency at the centre of the design — the bootstrap path exists to raise the storage element to the point where the reference, oscillator and regulation circuits can run at all, and none of those can help until it has. The Analog support row is the part most often underestimated: a bandgap that will not start below the rail it is supposed to enable, or a power-on reset that behaves incorrectly on a ramp measured in seconds, defeats an otherwise working power path.
CONTRIBUTION
What Faststream did.
The specific scope, rather than a capability list. Where a stage was shared with the customer’s
team, it is described as shared.
RF front end — impedance matching network and multi-stage rectifier, optimised for conversion efficiency at the low end of the incident-power range rather than at peak.
Power conversion — boost stage with maximum power point tracking, storage management and low-dropout regulation.
Analog support blocks — bandgap reference, relaxation oscillator, power-on reset, brown-out detection and a monitoring converter for field strength and storage state.
Power architecture — the end-to-end path from incident RF to a stable digital supply, including cold-start behaviour.
Supply supervision — brown-out detection and controlled shutdown so an interrupted operation leaves a defined state.
Ultra-low-power digital design — RTL and implementation for logic whose activity budget is measured in nanojoules.
Mixed-signal floorplanning — isolation, substrate and supply partitioning for RF, analog and digital on one die.
Parasitic-aware layout — matching and shielding for the sensitive analog blocks.
Verification — functional and post-layout across an unusually wide supply envelope.
Physical verification and tapeout preparation — through to a clean signoff and handoff package.
WHAT WAS HARD
The parts that consumed the schedule.
Rarely the subsystem that sounds difficult. Written out because a reader facing the same programme
gets more from this than from a summary of what went well.
01
Cold start
The single hardest problem. Resolving a circular dependency between the circuits that need charge and the circuits that manage charging determined the whole power architecture, and it was settled before anything else could be sized.
02
Efficiency where it matters, not where it flatters
A rectifier tuned for peak efficiency at high incident power looks better on a datasheet and delivers a shorter operating range. The optimisation target was moved to the weakest field the device must still work in.
03
Digital noise into a millivolt-sensitive front end
Even low-activity digital logic couples into a rectifier operating at millivolt sensitivity. Floorplan and supply partitioning had to solve this; post-layout adjustment could not.
04
Matching is only correct at one operating point
A rectifier's input impedance moves with both incident power and load current, so a matching network that is optimal at one field strength is progressively wrong either side of it. Choosing which operating point to match for is a range decision, not a peak-performance one.
05
Conversion efficiency is a curve, not a number
Rectifier power conversion efficiency peaks at a particular input power and falls away on both sides. Quoting a single efficiency figure describes one point on that curve and says nothing useful about the rest of it, which is where the device spends most of its life.
06
A reference that must start below the rail it enables
The bandgap is needed to regulate the supply, and needs a supply to start. Together with oscillator start-up energy this is the analog half of the cold-start problem, and it is the part most often left until after the power path is thought to be working.
07
Power-on reset on a ramp measured in seconds
Supply rises slowly enough that a conventional power-on reset can release incorrectly or repeatedly, leaving the digital core in an undefined state. Getting this right on a slow, non-monotonic ramp took more attention than the digital design it protects.
08
A verification envelope wider than usual
Supply varies over a far larger range than in a conventional part, so corner coverage had to span operating states most designs never enter, including partial-charge and brown-out recovery conditions.
OUTCOME
What resulted.
Tapeout-ready signoff
RF capture, power management, supply supervision and digital control integrated on a single mixed-signal die and taken through to a clean physical signoff.
Operating range set by design, not discovery
Because the rectifier was optimised at the low end of the field-strength range, usable range was a design output rather than something measured after the fact.
Defined behaviour under interruption
Brown-out detection and controlled shutdown mean an interrupted operation leaves the device recoverable, which matters when nobody is present to reset it.
A repeatable architecture
The power path is reusable across harvesting applications with different field conditions, rather than being tuned to one deployment.
Confidentiality
Customer projects are presented at property, capability, outcome and integration level. Customer names,
internal architecture, register maps, state machines and confidential deliverables are not disclosed.
Where a figure would identify a customer or a design, it is omitted rather than approximated. More detail
is available under a non-disclosure agreement, within the limits each customer has agreed.
PRODUCTS AND CAPABILITY USED
What this was built from.
Every item links to its own page, with characteristics, applications and the maturity status stated
honestly for that item.
It captures energy from an incident radio-frequency field, rectifies it to DC, conditions and stores it, and uses it to power a circuit — enabling battery-free devices where replacing a cell is impractical or impossible.
02
What is the hardest part of an energy-harvesting design?
Cold start. Before the storage element holds useful charge there is insufficient voltage to run the circuits that manage charging, and resolving that circular dependency determines the entire power architecture.
03
Why optimise the rectifier for low incident power?
Because operating range is set by the weakest usable field. A rectifier tuned for peak efficiency at high incident power performs worse exactly where the device's range is decided.
04
What is power conversion efficiency in an energy harvesting rectifier?
The fraction of incident RF power that emerges as usable DC. It is a curve rather than a single number — it peaks at a particular input power and falls away either side — so a single quoted figure describes one operating point and not the range the device actually works across.
05
Why is impedance matching difficult in a harvester?
Because a rectifier's input impedance varies with both incident power and load current. A matching network optimal at one field strength is progressively wrong either side of it, so the design decision is which operating point to match for across the intended range.
06
What analog blocks does a complete harvesting SoC need?
Beyond the rectifier and power conversion: a bandgap reference, an oscillator, power-on reset and brown-out detection, and usually a monitoring converter for field strength and storage state. These are frequently underestimated, because several of them have their own cold-start dependencies.
07
Can this architecture be reused?
The power path is designed to be reusable across harvesting applications with different field conditions, rather than tuned to a single deployment.