Multi-Protocol Synchronous Serial Engine IP
The Multi-Protocol Synchronous Serial Engine (MPSSE) IP integrates basic serial interface protocols like UART, SPI, and I2C into a single AXI interface port. The individual modules for these protocols have been implemented in a ruggedized form to avoid bus errors due to interfering noise from various sources thus making it suitable for application in automobile electronics.
- AXI4-Lite standard user interface. Connects as a 32-bit slave on the AXI interface
- Ruggedized SPI, I2C, and UART interface
- User-configurable number and type of interfaces through a configuration tool
- User-configurable parameters of each interface like baud rate/ datarate, modes, length of transmission, etc.
- Supports master and slave modes for SPI and I2C interfaces
- Configurable number of slaves on SPI interface
- Contains hardware FIFO for UART, SPI, and I2C interfaces with configurable depth up to 1024 words
Multi-Protocol Synchronous Serial Engine (MPSSE) Block diagram: