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Pixel Readout ASIC for X-Ray by Faststream Technologies has been delivering the newest transformation in Digital and Mixed-Signal ASICs for High-Reliability applications. Starting with 60nm (we still support 5V) to now 90nm technologies, generated in Advanced foundries worldwide, we come to new levels for our customers. We have entered the commercial/industrial/medical mixed-signal marketplace with mixed-signal IC design services and ASICs. This business system expanded into the marketplace of data-networking and suits current product offerings in the high-reliability standard product and ASIC areas.

ASIC design for low noise application X-Ray


Faststream Technologies carries Digital, Analog, and Mixed-Signal ASICs Design for cutting-edge signal-processing applications in commercial, industrial, and medical fields. Our expertise in multi-channel Readout circuits resulted in the design and manufacturing of several ASIC products dedicated specifically for X-Ray scanners and CT-Scan systems. Our ASICs can be provided in low or high volume as diced wafers and packaged chips.


We have VLSI readout front-end engineers/architects at various experience levels and they are well versed with X-ray imaging, using specific capacitive silicon detectors, with capacitance ranging from 2 to 10 pF.


Our team has experience designing chipsets in the large-scale, portable X-ray applications for a-Si backplanes which incorporate the high-voltage row-driver ASIC. It manages the Thin Film Transistor pixels and a low-noise, column readout ASIC that reads the charges from the pixels.


Faststream’s expertise attains advanced noise levels with plenty of lower power utilization as well as cost. We assembled the ASIC chip on the glass panel using chip-on-glass flip-chip technology with an anisotropic conductive film. Our ASICs are currently utilizing commercial X-ray images.


For the Chipset Design, In each Pixel Readout ASIC for X-Ray, we integrate both the front-end, low-noise, low-power analog part as well as the digital part in which noise counts is near about 1 fps/ 14-bit/ 2.8 in the Static mode and nearly 5 fps/ 4.4 noise counts for Dynamic mode.


We use a High ball count in like 216 I/Os per ASIC which can be implemented on the 180 nm BCD Technology and 3456/2880 Rows to Columns pixel ratio.