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DIGITAL PREDISTORTION (DPD)

The next fifth-generation (5G) wireless networks promise connection speeds and data rates that are 100 times faster than current networks, as well as much enhanced signal and connection quality. As wireless communication systems evolve, the necessity for linearity in Power Amplifiers becomes more difficult. The use of Radio Frequency (RF) power amplifiers with wideband signals, such as WCDMA (Wideband Code Division Multiple Access) utilized in UMTS (Universal Mobile Telecommunications System), results in the development of out-of-band emissions known as “Spectral regrowth”. This work employs the Digital Predistortion (DPD) approach to increase PA (Power Amplifier) efficiency and linearity.

PA-with-Doherty, DPD

Multi-band operation usually requires multiple power amplifiers to cover each frequency band, thereby increasing the size of the base station. Having GaN Doherty Power Amplifier as a technique for reducing power efficiency and envelope tracking. Doherty PA design presents many challenges to simultaneously achieve both high efficiency and low distortion for wideband carrier aggregation. Faststream’s Using Doherty power amplifier in DPD for achieving high efficiencies with up to 661 MHz instantaneous bandwidth while maintaining ACLR of −32 dBc.

 

A Digital Pre-distortion (DPD) in conjunction with a power amplifier is created in MATLAB/SIMULINK utilizing the Memory Polynomial Algorithm. The developed algorithm was evaluated against a variety of test scenarios, and it was shown to have strong nonlinearity and good performance for memory polynomials of orders 4 and 5, as well as nonlinearity coefficients with linear output. The output of the previous and current inputs is produced using Memory Polynomial DPD. The benefit of DPD is that it produces a linear power amplifier with low distortion and high nonlinearity.

 

A DPD is a critical component of wireless communication systems that are used to increase the efficiency of power amplifiers. By decreasing the distortion caused by running them in their nonlinear areas, power amplifiers may be made significantly more efficient. Wireless base stations that do not use CFR or DPD algorithms often have low efficiency, resulting in expensive operational and capital equipment costs.

Block Dagram of Digital Predistortion

It is critical to examine DPD design since it becomes more expensive with an increase in bandwidth. Because everyone understands that 500 MHz is the core model for 5G, new DPD designs should be created regularly. Therefore, we propose a DPD design model that converts nonlinear PAs to linear PAs by adding a particular bandwidth range via a feedback loop.

 

The DAC sampling rate for the predisposed signal can be effectively reduced since it is limited to a particular bandwidth. The signal is then upconverted and fed into the mm-wave PA. Also, the Tx bandwidth of the pre-distorted input signal can be largely reduced since it occupies only limited bandwidth. As a result, only a portion of the distortion in the PA output will be compensated, and a band-pass filter will be used to suppress the remaining out-of-band distortion, which is relatively low.

 

We have created a filter using PA that can be included in the PA output matching network. As previously mentioned, the output PA has a limited bandwidth, which we feed into the feedback loop, which also has a limited bandwidth, so we put input and output signals into the model extraction block.

 

The Faststream DPD core shortens implementation time by offering clients a high-performance DPD solution as a parameterizable core rather than one that must be modified by hand. Faststream DPD is also optimized for Xilinx FPGA implementation, resulting in a very small FPGA footprint and the lowest cost FPGA option available today. Faststream DPD IP now distorts and handles long-term memory effects encountered with Gallium Nitride (GaN) amplifiers, allowing customers to achieve great efficiency while fulfilling demanding spectrum emission mask (SEM) and error vector magnitude (EVM) requirements at all power levels.

 

 

DPD linearization Implementation

 

R & D organizations face tough competition from wireless communications, demonstrating a strong preference for efficiency and product quality. Thus, to increase efficiency, corporations often provide data services. At higher rates, providing data services becomes more difficult for wireless transmission because of the transmitter’s nonlinearities. To achieve improved power efficiency, we frequently operate near saturation, where we may see two factors that affect PA, namely PAPR and signal bandwidth. To prevent these effects in transmitters, we will employ DPD, which converts the nonlinear behavior of power in the previous stage to linear while maintaining high output power and efficiency.

DPD CFR setup with intel FPGA

ZCU102 evaluation eval board with ZU9EG ZynUltraScale + MPSoS will host the Adaptable IP for DPD and CFR also JESD204 connectivity IP to the AFE7769 transceiver. AFE7769 uses JESD204C for the connectivity to the Intel or Xilinx FPGA. We used PA SKY66293-21, which generally delivers 32.6 dB, and HMC114PM5E, which typically provides 33.8 dB, to assess DPD linearization. According to the new NR requirements for 5G, SKY66293-21 is designated as a Local Area BS and the latter as a Medium-Range BS due to their varied output strengths. To assess linearization performance, we set the former to +22 dBm and the latter to +36 dBm, indicating sufficient local and medium-range BS transmit power limitations.

DPD CFR setup with xilinx FPGA

We use error vector magnitude (EVM) and adjacent channel power ratio (ACPR) measurements for in-band and out-of-band linearization performance by taking the local area as 78BS with transmit power of +24dBm and Medium Range BS with transmit power of +38dBm, which demonstrates high power power amplifier Linearization of NR Specifications of 5G that we can use in real-time applications.

 

Linearization Performance of the Algorithm with PA Without DPD and With DPD PA

DPD - Digital Predistortion, DPD block Diagram

Without the DPD operation, none of the PA outputs meets the EVM restriction of 8% in the context of the 3GPP constraints. However, when DPD is used, the EVM goes significantly below the limit in both circumstances. Without the DPD, the only method to meet the needed 8% limit would be to reduce transmission power, which would reduce the PA’s power efficiency. With DPD, PAs can be operated more efficiently and could be more saturated in terms of EVM limit, which is necessary for HMCC1114PM5E PA.

DPD - Digital Predistortion, DPD block Diagram

In order to provide 5G solutions that are both low-cost and high-performance, our technology includes algorithms such as DPD and CFR in operator network radios. During test-driven development, the system sends and receives signals to enable and disable the amplifiers. Our radio systems offer smooth scalability and enable antenna array combinations such as 2T2R and 4T4R.

 

To improve spectral efficiency we added 256-QAM and 64-QAM for higher-order modulation. 256-QAM small cell deployment by Faststream service providers generates a conducive radio environment for 256-QAM. This leads to a significant gain in spectral efficiency proportionate to the number of tiny cells deployed.

 

Air interface protocols that are supported:

 

  • 5G NR
  • TD-SCDMA
  • WCDMA
  • WiMAX
  • CDMA2000

Benefits and Features

 

  • Two transmitters consume less than 100 mW of power, which is one-tenth that of comparable FPGA-based systems
  • Allows for the use of a high-efficiency power amplifier (PA) to minimize system power consumption
  • Complete development toolbox for reducing time to market
  • A collection of tried-and-true power amplifiers from well-known brands
  • A full application program interface (API), and control graphical user interfaces (GUIs)

Digital Pre-distortion (DPD)