Development of verification plans – Verification environments, Test cases and ensuring coverage and performance goals are achieved for IP and SOC level.
Working Knowledge of ARM processors.
HVLs/Tools: SV, UVM, C – Domain: Networking, DDR2/3/4, Ethernet PCIe.
Experience in Design Verification.
Strong System Verilog or Specman expertise OVM/UVM/eRM expertise highly desired.
Good knowledge of protocols.
Ability and desire to learn new methodologies, languages, protocols.
Experience with SV/UVM/OVM/VMM with PCIe/USB(Mandatory 6 months experience or Specman/eRM/UVMe).
Experience with SOC with C/ASM based tests, Graphics or CPU is an added advantage.
SOC System on Chip Verification;Proficient on protocols like AXI, AHB, USB, PCIe, DDR, LPDDR, HDMI, MIPI, Ethernet.
Should have good understanding of Digital Design Flow (CDC, Low Power, HDL Simulation, Synthesis) & Tools.
Preferred to have know-how of ARM Cortex-A series Cores like A7 ; AMBA Busses – AXI, AHB, ATB, APB and Associated Peripheral / Debug components.
Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC,SystemVerilog Language like C,UVM methodology.
Specman e Language – language like Verilog similar to SV Methodology.
ARM based processor on above lot of IP configured, 5 10 ARM core, IPs like PCI, USV, Ethernet, SPI, Sadus, Memory controllers, DDR, I2C.
