Faststream Technologies offers IP Core design services for different sectors like Audio, Video, Broadcast, Internet Protocol and Telecom Applications with special focus on digital solutions. We are using logic devices from Altera,Xilinx,Actel and Atmel to create Logic ware based solutions.
Memory and PHY IP
Our family of memory PHYs offers a number of compelling benefits to chip and system designers alike, including reduced power consumption, increased data rates and improved cost-effectiveness – giving designers the advantage of increased margin and flexibility. These solutions are applicable to a broad range of applications spanning from mobile, to consumer to enterprise. Our PHYs consist of hard macros of the command/address (C/A) and 8-bit data cells, and include IO pads, phase lock loops (PLL), power mode management (PMM), transmit and receive paths, clock distribution, control logic, power distribution and electrostatic discharge (ESD) protection circuitry.
Analog and Mixed Signal IP
Analog and mixed-signal logic are generally defined as lower-level, physical description. Hence, our analog IP (SerDes,PLLs,DAC,ADC,PHYs etc.) are provided to chip makers in transistor-layout format (such as GDSII). Our Analog and Mixed Signal IP consists of RF Modules, Clock Synthesizer, Amplifier and Oscillator, ADC and DAC ,Voltage Regulator,PLL,DLL and Codec. Our extensive experience of developing components across these domains made us the preferred solution provider for global leading enterprises.We can ramp up high speed analog blocks or a low power and area constrained design as well as reduce full chip level simulation time by creating accurate Analog models at the block and full chip levels.
CPU and Peripherals IP
Most of our System-on-Chip design contains some essential peripheral building blocks as well as some efficient small microprocessors. The number of these standards has grown rapidly throughout the last decade — and the trend is expected to continue. Faststream is dedicated to providing systems and peripherals IP building blocks that can be integrated easily into designs, so you can stay focused on your overall design. What’s more, all of our peripheral IP cores plug and play in the ARM bus environment. Our CPU and Peripheral IP consists of DMA Controller,LCD Controller, Interrupt Controller, I/O Controller, Receiver/Transmitter, Clock Generator etc.
Our communication subsystem consists of an FPGA device necessary to implement telemetry and telecommand and certain glue logic for different devices on the embedded system. The command and data handling block is developed in-house to implement the telemetry and telecommand functionality necessary on the satellite. In the process, various IPs like FSK demodulator, BCH decoder, command decoder and validator, convolution encoder etc. are also designed. These are functional and tested successfully in real satellite environment. A ground station was established for telemetry and telecommand of the satellite and various IPs related to the ground station including antenna pointing system, RF receiver system and programmable antenna tracking system were developed.Our Wireless Communication IP consists of CDMA,Bluetooth,802.11, 802.16,NFC,LTE and GPS.We also working on different Wired Communication IP like Ethernet,Datacom,HDLC,Modem,Optical.
Faststream Technologies offers best in class multimedia components (Codecs & Framework) as software & hardware solutions based on specification laid by standard bodies as a reference solution. The video, audio, speech and image codecs are available on a range of widely used platforms such as ARM, DSP & FPGA. These components are designed for efficient utilization of available processors & resources.Multimedia IP portfolio from Faststream is targeted for, but not limited to industry segments such as broadcast, consumer electronics, automotive and telecommunications.Our Multimedia IP solutions focus on leveraging latest connectivity technologies like Encoders and Decoders for both audio and video.