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Posit Co-Processor

Floating Point (FP) arithmetic has become more widespread in wireless communications, military applications, aeronautical applications, 3D graphics simulations, aircraft design and signal processing. However, FP number system provide less accurate, less dynamic range and more exceptions resulting in complicated Floating Point Unit (FPU) and power greedy processors. On other hand, POSIT number system offers much better accuracy, better dynamic range and fewer exception at half data width with respect to FP number system.

 

The Posit Co-Processor designed has circuit that is much simpler, silicon efficient and high performance. Our PNU performs addition, subtraction, multiplication, division, square root and other operations about 4X faster with respect to state-of-the-art FPUs. These operations are quite frequent in FP applications.

 

Supported Features

 

  • Sum of Products
  • Addition/Subtraction
  • Multiplication
  • Multiply Add/Subtract
  • Two independent multiplications
  • Increment, Decrement
  • Two two’s complement operations
  • Sum of Reciprocals
  • Sum of Inverse Square roots
  • Sum of Divisions
  • Sum of Square roots