Category C is primarily used for minimizing link power dissipation. The efficiency of comparative power for different classes of C are low,medium and high respectively for class C-S,C-M and C-R.
The JESD204C PHY specification is similar to the Optical Internetworking Forum SxI-5 and TFI-5 enactment accordance which generally referred as Current Mode Logic .The Bit Error Rates of less than 1e-12 are expected to be achievable with complaisant transmitters (TX) and receivers (RX) .
The JESD204C controller IP of Faststream Technologies is an immensely effective and silicon sceptic execution of the JEDEC and JESD204C standard which can target any customised FPGA/ASIC/ASSP technologies. This IP-core carries line speeds of 32 Gbps/lane or less and comprises full backwards harmony with JESD204B. The IP core allows reliable and quick installment of both the transmitter (TX) and the receiver (RX) link layer which comes with a firmly integrated transport layer option. The IP comes with an extensive set of parameters which are available and have gone through for extensive testing.
Specially, TX pre-emphasis and RX equalization on the converters and ASICs/FPGAs at Faststream is a choice at 12.5 Giga-bite per second, depending on the distance of the transmission line. JESD204C keeps the 20 cm length(reach) with one or more than one impedance-controlled (specially 100 ohm differential) connectors transmission line features as JESD204B.